Branches · HARDWARE

Next-generation silicon

AI hardware stopped being a graphics card. It is now a rack of several specialised chips working as one enormous machine.

The platform is designed as a whole: CPU, accelerator, switches and network chips built together. In parallel, every hyperscaler is building its own.

Status
TypeBranches
Marker
What exists today7

Researched

2026-01-06

NVIDIA Vera Rubin

Six new chips as one AI supercomputer: Vera CPU, Rubin GPU, NVLink 6, ConnectX-9, BlueField-4, Spectrum-6.

verifiedNVIDIA
2026-02

Meta MTIA v3

Third-generation in-house silicon enters broad data-centre deployment.

reported
2026-03

Rubin in production

By GTC 2026 the platform grew to seven chips in production; partner availability lands in H2.

verifiedNVIDIA

In progress

2026

TPU v6, Trainium3, Maia 2

Google, Amazon and Microsoft scale their own accelerators — NVIDIA's share under real pressure for the first time.

reported
препятствие

Memory is the shortage

The bottleneck moved from compute to data delivery: the chip idles waiting for memory. HBM supply is booked years ahead.

NEWreported

Planned

в планах

Optics between racks

Copper can no longer carry the required connectivity — interconnects move to light.

NEW

Distant horizons

впереди

A chip for one model

Silicon designed for a single architecture rather than a class of tasks: multiples of efficiency at the price of total inflexibility.

NEW
Branches off
To the line

Track the line as it moves

Once a week: which branches advanced, what unlocked, and what turned out to be overstated.